Today ARM announces the new Cortex A32 ultra-low power/high efficiency processor IP. For some readers this might come as a surprise as it's only been a few months since we saw the announcement of the Cortex A35 which was presented as a replacement for the Cortex A7 and A5, so this leaves us with the question of where the Cortex A32 positions itself against both past IPs such as the A7 and A5, but also how it compares against the A35.

The answer is rather simple: It's still a replacement for the A7 and A5, but targets even lower power use-cases than what the A35 was designed for. While ARM sees the A35 as the core for the next billion low-end smartphones, the A32 seems to be more targeted at the embedded market. In particular it's the "Rich Embedded" market that ARM seems to be excited about. The differentiation lies between use-cases which require a full-fledged MMU and thus able to run full operating systems based on Linux, and those who don't and could make due with a simpler micro-controller based on one of ARM's Cortex-M profile IPs. It's also worth to mention that although last time we claimed that the A35 would servce the IoT market, ARM seems to see wearables and similar devices as part of the "Rich Embedded" umbrella-term and thus now it seems more likely that it's the A32 that will be the core that will power such designs.

This leads us to the mystery of what exactly is the A32? During the briefing the only logical question that seemed to come to mind is: "Is this an A35 with 64-bit 'slashed off'?" While ARM chuckled at my oversimplification, they agreed that from a very high-level perspective that it could be considered as an accurate description of the A32.

In more technical terms, the A32 is an 32-bit ARMv8-A processor with largely the same microarchitectural characteristics of the Cortex A35. As a reminder to our readers out there: The ARMv8 ISA is not only an 64-bit instruction set but also contains many improvements and additions to the 32-bit profile commonly named as AArch32. Among the larger differences between the A35 and A32 is that the latter's microarchitecture has been tuned and optimized to achieve the best performance and efficiency for 32-bit.

Indeed, performance wise, the A32 is advertised as being able to match the Cortex A35.  The improvements lie in power efficiency: as a result of dropping its 64-bit capabilities, the new core is now able to achieve up to 10% better efficiency than the Cortex A35. Similarly to the A35, the A32 promises to achieve vastly superior performance per clock versus the Cortex A5 and A7, achieving anywhere from a 31% increase in integer workloads to a massive factor of 13x in crypto workloads, which the A32 is still capable of as they're included in the AArch32 ARMv8 profile.

While only a few months ago the Cortex A35 was advertised as ARM's smallest Cortex-A core, this title has now been passed on to the A32. ARM claims the core is around 30% smaller than the A35; The decrease in size, mostly due to the slimming down of the micro-architecture due the removal of 64-bit capability, allows the Cortex A32 to scale down to <0.25mm² in its smallest configuration, a significant decrease compared to the A35's disclosed <0.4mm². The core remains as configurable as the Cortex A35, able to run as either as single core or any as a cluster up to four cores. Optionally vendors can also configure cache sizes, with L1 ranging from 8KB to 32KB and L2 either being completely absent to up to 1MB in size.

ARM's philosophy of "having the right design for the job" now seems more apparent than ever as we see an steadily increasing portfolio of processor IPs specialized for different use-cases. The A32 seems to fit right in with this strategy and we'll more than certainly see a large array of devices powered by the core in the future to come.

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  • Dmcq - Wednesday, February 24, 2016 - link

    A 64 bit only processor certainly sounds a good idea to me for embedded processors where performance is critical. the instruction set is more efficient and cleaner and it would get rid of a lot of cruft.

    The cruft though is probably what makes the 32 bit ARM version the choice for a chopped down version at the moment. It has instructions that do part of what the SIMD instructions do so the degradation from removing the SIMD isn't quite as bad as it might be, and it has the Thumb-2 instruction set which is more compact than other 32 bit processors. Plus there is a lot of embedded code already developed for it.

    To get something similarly tiny with the 64 bit you'd need to add the SIMD in general register type DSP instructions and a compact Thumb like encoding and a flag to say ignore the top 32 bits in address calculations probably wouldn't go amiss either to get round possible funnies. It doesn't sound pretty so I think it is 32 bit ARM for the very low end for quite a while yet.
  • extide - Monday, February 22, 2016 - link

    I like this core, although I hate that they called it the A32 -- it's too confusing with AArch32 and stuff. I mean in a way it is fitting, as it is 32bit, but ehh.
  • Floyd42 - Tuesday, February 23, 2016 - link

    So, what's the code name of this core? Mercury was the only one they published in this low end area, but this is taken already for the A-35.
  • Manabu - Wednesday, February 24, 2016 - link

    Ceres? :P
  • zugzug1 - Thursday, March 31, 2016 - link

  • MrSpadge - Tuesday, February 23, 2016 - link

    Perfect for the new 16 core smartphones for the asian market, which are still going to be outperformed by 2 of Apples cores.
  • kreacher - Saturday, February 25, 2017 - link

    What's happening with A-32/35? It's been an year and new Android Wear 2.0 smart watches are still being released with A-7 (SnapDragon 2100).
    I was hoping to buy a smart watch this year with decent battery life and performance (A-35/32 on 10nm) but it looks like wearables still need a couple more generations to mature.

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