AnandTech | Articles by Dr. Ian Cutress

Nimbus Data’s New ExaDrive NL: 64 TB of Enterprise Grade QLC in 3.5-inch

Today Nimbus Data, one of the first companies to venture into enterprise flash storage in 2003, is announcing its latest generation ExaDrive product. Following on from the success of...

27 by Dr. Ian Cutress on 8/26/2020

NVIDIA Confirms 12-pin GPU Power Connector

Today as part of a video showcasing NVIDIA’s mechanical and industrial design of its GPUs, and how it gets a large GPU to dissipate heat, the company went into...

80 by Dr. Ian Cutress on 8/26/2020

TSMC Expects 5nm to be 11% of 2020 Wafer Production (sub 16nm)

One of the measures of how quickly a new process node gains traction is by comparing how many wafers are in production, especially as that new process node goes...

13 by Dr. Ian Cutress on 8/25/2020

TSMC Teases 12-High 3D Stacked Silicon: SoIC Goes Extreme

I’ve maintained for a couple of years now that the future battleground when it comes to next-generation silicon is going to be in the interconnect – implicitly this relies...

16 by Dr. Ian Cutress on 8/25/2020

TSMC Updates on Node Availability Beyond Logic: Analog, HV, Sensors, RF

Most of the time when we speak about semiconductor processes, we are focused on the leading edge of what is possible. Almost exclusively that leading edge is designed for...

3 by Dr. Ian Cutress on 8/25/2020

‘Better Yield on 5nm than 7nm’: TSMC Update on Defect Rates for N5

One of the key metrics on how well a semiconductor process is developing is looking at its quantitative chip yield – or rather, its defect density. A manufacturing process...

107 by Dr. Ian Cutress on 8/25/2020

Intel Moving to Chiplets: ‘Client 2.0’ for 7nm

One of the more esoteric elements of Intel’s Architecture Day 2020 came very near the end, where Intel spent a few minutes discussing what it believes is the future...

67 by Dr. Ian Cutress on 8/21/2020

Intel’s New 224G PAM4 Transceivers

One battleground in the world of FPGAs is the transceiver – the ability to bring in (or push out) high speed signals onto an FPGA at low power. In...

12 by Dr. Ian Cutress on 8/21/2020

Intel’s Future 7nm FPGAs To Use Foveros 3D Stacking

One of the main battlegrounds of future leading-edge semiconductor products will be in the packaging technology: being able to integrate multiple elements of silicon onto the same package with...

11 by Dr. Ian Cutress on 8/21/2020

Cerebras Wafer Scale Engine News: DoE Supercomputer Gets 400,000 AI Cores

One of the more interesting AI silicon projects over the last couple of years has been the Cerebras Wafer Scale Engine, most notably for the fact that a single...

8 by Dr. Ian Cutress on 8/21/2020

Intel Xe-HP Graphics: Early Samples Offer 42+ TFLOPs of FP32 Performance

One of the promises that Intel has made with its new Xe GPU family is that in its various forms it will cater to uses ranging from integrated graphics...

43 by Dr. Ian Cutress on 8/21/2020

Intel’s SG1 is 4x DG1: Xe-LP Graphics for Server Video Acceleration and Streaming

For the last few years, Intel has had a product line known as the Visual Computing Accelerator (VCA). With the VCA2 product being put on EOL earlier this year...

9 by Dr. Ian Cutress on 8/21/2020