The core architecture inside the latest Xeon is typically a step behind what you find inside the latest desktop and notebook chips. A longer and more thorough validation is one reason, but there is more. The high-end model of the Xeon E5-2600 V2 or "Ivy Bridge EP" is, aside from the core architecture, completely different from the Ivy-bridge "i7 \-3xxx" that was launched in the spring of last year. With up to twelve cores, two integrated memory controllers, no GPU and 30MB L3 cache, it is the big brother of the recently reviewed Ivy-bridge E (Core i7-4960X). Intel has three die flavors of the Ivy-bridge EP:

The first one is the one with the lowest core count (4/6 cores), which is found in SKUs targeted at the workstation and enthusiast market (high frequencies) or low power SKUs; this is the core being used in the enthusiast Ivy Bridge-E processors. The second one is targeted at the typical server environment with higher core counts (6 to 10 cores) and a larger L3 cache (25MB). The third and last one is the high performance HPC and server die, with 12 cores, two memory controllers for lower memory latency, and 30MB of L3 cache.

The cool thing about the newest Xeon E5 processors is that they run on the same Romley EP platform as LGA-2011 chips. This should save the OEMs a lot of time and money, and hopefully these savings will trickled down to the customers. Let's see how Intel's latest server update performs, and if it manages to impress more than the enthusiast Ivy Bridge-E.

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  • psyq321 - Tuesday, September 17, 2013 - link

    Yep, EP-46xx v2 will use the same C1 stepping (for HCC SKUs) for production parts as 2P Xeons, but there will be some features enabled in microcode which did not make it in the 26xx SKUs.

    EX is already on D1 stepping for QS, as the validation cycle for EX is more strict due to more RAS features etc.
  • Casper42 - Tuesday, September 17, 2013 - link

    So I work for HP and your comments about 4x1P instead of 2x2P make me wonder if you have been sneaking around our ProLiant development lab in Houston.

    I was there 6 weeks ago and a decent sized cluster of 1P nodes was being assembled on an as yet unannounced HP platform. I was told the early/beta customer it was for had done some testing and found for their particular HPC app, they were in fact getting measurably better overall performance.

    The interesting thing about this design was they put 2 x 1P nodes on a single PCB (Motherboard) in order to more easily adapt the 1P nodes to a system largely designed with 2P space requirements in mind.

    Pretty sure the chips were Haswell based as well but can't recall for sure.
  • André - Tuesday, September 17, 2013 - link

    Would be nice to see benchmarks for OS X, considering this thing is going inside the new Mac Pro.

    Final Cut X, After Effects, Premiere Pro, Photoshop, Lightroom, DaVinci Resolve etc.

    I believe the 2660v2 hits the sweet spot with it's 10 cores.
  • DanNeely - Tuesday, September 17, 2013 - link

    That'd require Apple giving Anandtech a new Mac Pro to run benchmarks on...
  • Kevin G - Tuesday, September 17, 2013 - link

    Now that Intel has officially launched the new Xeons, the new Mac Pro can't be far behind.
  • wallysb01 - Tuesday, September 17, 2013 - link

    Well, you could run the CPU benchmarks just fine. But not the GPU ones.
  • Simon G - Tuesday, September 17, 2013 - link

    Typo in Conclusion section . . . " Thta's no small feat, . . ."
  • garadante - Tuesday, September 17, 2013 - link

    There's a minor error on the Cinebench single-threaded graph. It has the clock speed for the E5-2697 v2 as 2.9 instead of 2.7, as it should be. Which is semi confusing on that graph as it explains the lower single-threaded performance from the E5-2690.
  • SanX - Tuesday, September 17, 2013 - link

    This forum has most obsolete comments design of pre-Neanderthals times, no Edit, no Delete, no look at previous user comments. Effin shame
  • MrSpadge - Tuesday, September 17, 2013 - link

    You mixed up forum and article comments.

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