Exactly. I am looking right now at an amazing price for a 1950X for a storage system/server. I will be using all PCI lanes for 8x expansion slots. Nothing comes close to the value on offer with TR4.
That argument is harder to make given Ryzen 3 will also have PCIe 4.0 & probably up to 16 cores. Now unless someone needs/wants tonnes of PCIe lanes, the move to TR3 would be less rewarding. Of course the extra cores, quad channel memory & obviously workstation/server usage are the major selling points which'd still work in TR's favor.
A lot of the memory issues with Threadripper have been settled.
Depending on the app even a quad core has been memory limited in the past.
There will certainly come a point where mainstream needs more memory bandwidth but currently I think we're still limited by processing power in most situations. Most, not all.
No, the Von Neumann bottleneck is still the most serious hurdle to increased computer performance. CPUs (and to a lesser extent GPUs) are *much* faster than the main system memory they are paired with, which is why caches have been employed to alleviate the bottleneck and the size of caches keeps increasing. CPUs wait (and have waited for quite a long time) for main memory, not the other way around. CPUs are faster than main memory, faster than L3 cache, faster than L2 and even L1 cache, and are roughly as fast as the tiny memory they have in their registers (let's call that L0 cache).
16-core Ryzen CPUs, assuming they are released, will be highly memory bandwidth constrained due to the platform's 2 memory channels. However 16 cores with 2 memory channels is equivalent to 32 cores with 4 memory channels and 64 cores with 8 memory channels : these CPUs all have 1 memory channel per 8 cores.
So if 8 cores are indeed memory limited with 2 channels (i.e with 1 channel per 4 cores) the problem with upcoming high core count Zen 2 based CPUs will become twice as worse. It probably doesn't make sense to get a Threadripper with less than 16 cores, but even with 16 cores and 4 memory channels it is just equivalent to a 8-core Ryzen with 2 channels memory bandwidth wise (though with many more PCIe lanes).
Will the I/O die have an extra L4 cache to alleviate the memory bandwidth pressures or would that only make them worse (if the L4 cache's latency was not low enough)? Maybe an L4 cache will be added only to Epyc's large I/O die and possibly to Threadripper's? I have no idea.
It doesn't appear they're going to be doing that. Current rumors have Ryzen 3rd Gen parts with 12 and 16 cores in the 4-5GHz range. If they want to gain marketshare back from Intel, I don't think they will want to artificially clock limit the more mainstream parts. I'm guessing Intel will still have a bit of an IPC advantage, so AMD will probably want to beat them with cores and clocks.
Clock speeds should all universally move with AMD's design approach. They can bin the chiplets before putting them into packing so that chips that bin the same are packaged the same. This creates uniformity.
The clock uptick stems of yield probabilities and they are using a smaller CPU die. There is simply less chance that a single low clocked core can bring down the entire SoC's performance slot. If even there is a core that simply won't clock as high as the rest, AMD can fuse that off to bring forward 12 designs at high clocks. AMD's strategy here is very flexible in what they can bring to market.
Nah, HDET has always been for specific customers, and there will always be buyers that want these extreme configurations. MOST users will be better off buying a desktop-class rig, but that has always been the case. How many people even get the most use of 6-8 cores? In my mind, Ryzen 2 needs more single thread performance—more IPC, more clockspeed.
I'd love a Threadripper as a single-box compile farm. It's unfortunate how massively huge the TR boxes are, I much prefer SFF cases as I don't need GPUs and storage is in M.2 NVMe drives, so lots of drive bays is not a requirement either.
AMD could go for an entire "Champion of Consumer Choice" PR campaign; "Choose your core count. Choose your connectivity. No locked features. Pay for What You Need."
Not really, Threadripper has always featured "cream of the crop" CPUs along with quad channel DRAM. For instance, my 1950X sits here running stable at 4.25 GHz and 64 GB of DDR4-3200 DRAM.
amd claims the new ryzen will rival the 9900k in games. I believe this to be true but another question is will the price be lower (i doubt it). and even more important will they have a rival to ths 9700k and 9600k in VALUE considering those are really good value buys for anyone who wants near 9900k performance at a much lower price.
not a fanboy of any of these companies but I am rooting for progress and intel does have some high value k variant cpus this time
Lack of AVX512 makes AMD less attractive vs Intel. Ian own test with 3D particle movement shows 3-4x speedup with AVX512 unless he got a bug in his code
Less attractive for a very tiny niche, perhaps. You simply won't see AVX512 being a factor in regular applications or games. 3D particle movement is great but not a use case for those sorts of applications.
It will take some time for AVX512 to be widely adopted. New instructions are always slow to get deep market penetration. This is due to several reasons but one of the major ones is that for most programmers it isn't up to them at all. what instructions are used is something usually determined at the compiler level not necessarily in the source code. Different instructions can be selected to be used in the compiler settings but it can be hard to know what exactly comes out on the other side. Long running projects are also unlikely to immediately start supporting new features for the sake of compatibility and if you are a developer who uses a high level interpreted language like JavaScript or Python then you are so far removed from the metal you have effectively zero say in what assembly level instructions are called.
Compatibility is not an issue, you just guard the AVX512 codepath behind a CPUID check, and if the CPU doesn't have AVX512 you simply fall back on the current codepath.
The real big difference is that AMD is basing there numbers on pre-Sunny Cove, Sunny Cove changes everything besides just AVX512 is going be include as standard on Sunny Cove processors
Sunny cove has even more significant architexture changes that should significantly change performance with more execution units and larger caches.
Also I not sure how far Intel plans to go with Foveres 3D packaging - which should significantly help the CPU by allowing more transistors in same CPU area - allowing IO, CPU, GPU and Memory ( likely graphics memory ) to all be on different levels.
Current pricing on Intel CPU's is ludicrous. I've built so many 2600/2600x/2700/2700x computers in the last few months mainly because of the pricing problem Intel has right now.
I'll sum up HStewart's comments on every article whether or not it's about Intel, this is what he will say.... HStewart: Intel shill shill shill shilly mcshill shill shillty shill shill, shill. AMD sucks. Intel shillllllllllllll......
I really, really don't share your enthusiastic "Significant change in performance" as you do. On paper, yes Sonny Cove looks amazing, but so did Skylake compared to Haswell. I'm expecting at most 15% increase from the architecture change. Remember AMD also doubled parts of their execution code path, namely the AVX stuff from Zen+ to Zen2, and that gained them up to 28% in very specific workloads.
Like Intel would give away the most useful parts of AVX-512 on low-level CPUs, anyway, if it could get away with *not* doing so to enable product segmentation. They didn't enable AVX on Celeron until Kaby Lake Refresh this January, when suddenly it *and* AVX2 magically appeared: https://en.wikipedia.org/wiki/List_of_Intel_Celero...
Of course, that's Celeron Mobile, not the desktop CPUs. And why? Because Intel's own argument was being used against them with the AMD's 2xxxU mobile, which have them both. Never mind that power usage in that segment makes the benefit of such code dubious.
Having more cores will trump AVX-512 most of the time. Especially since AVX-512 can limit your max turbo speed. Intel themselves have backed off their own compiler from using AVX-512 instructions in many cases, because of the negative impact they have on other executing code: https://lemire.me/blog/2018/08/13/the-dangers-of-a...
The other comments there are worth reading too - did you know there are multiple levels of AVX clock-reduction? Naturally it's worse if more CPU cores are involved, because it uses more power: https://en.wikichip.org/wiki/intel/xeon_gold/5120#...
There are clear potential advantages to new instructions, but unclear costs, In many cases the benefit is illusionary, because the CPU simply can't run at full power using those instructions. Perhaps these restrictions will be alleviated by 10nm. Until then, we can't rely on it being useful, and therefore it's not going to factor into our purchasing decisions.
this design have one more benefit. Hottest parts are way apart on silicon. This means single thread performance might be same as 2-4 threaded. We all use threaded stuff more and more. With this cpu's it really might be a lot of gains, but not in our usual metrics.
I think the for single thread and even multi-threaded performance is not really much depending on separating IO - but more on execution unit changes. More cores does not always mean more performance - it also depends on designed of architexture that makes up cpu.
The problem with game development unless something has been significant has been change in technology - the display part of screen is a single thread resource.
"AMD’s 3rd Gen Ryzen processors for desktops rely on the brand-new design code-named Matisse. Matisse features two dies: a chiplet die containing eight cores based on the Zen 2 microarchitecture, and built using TSMC’s 7N manufacturing process; and an I/O die featuring PCIe 4.0 lanes"
Now, the thing currently most on my mind regarding 3rd gen Ryzen desktop processors is if AMD uses the chiplet design to deny us lowly consumers a MMU supporting ECC, either leaving that for Ryzen Pro, Threadripper or even EPYC. I'm currently planning to do a Ryzen 3000 build later this year, but ONLY if I can get ECC support.
To save costs, I guess. And/or to segment the market (although I'll give AMD the benefit of the doubt with this one).
Before going with the chiplet approach AMD pretty much only had the option of putting so many CCXs on the die. Now, with chiplets they can pretty much mix and match. And it's not as if these would be the first Zen-based processors without ECC support. The Raven Ridge mobile processors have that honor.
Anyway, I hope I'll be pleasantly surprised when AMD decides to share more details on the upcoming desktop range. I *really* want a Ryzen 3000 in my next build.
I don't know how much they can do with it based on a chiplet design, but a high-clocked 32-core/64-thread TR that doesn't make memory access concessions would hit the sweet spot for workstation use.
If they're going 16-core with the consumer-oriented Ryzen line, they might as well make TR the equivalent of Intel's Xeon W line, and provide full performance and features for 1S professional workstations.
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austinsguitar - Wednesday, March 6, 2019 - link
if they do indead release 16 or 12 core ryzen 3000 for am4... hedt will look Iidiotic to buy...austinsguitar - Wednesday, March 6, 2019 - link
dumb. woopsies. English language hitting me hard right now.Marlin1975 - Wednesday, March 6, 2019 - link
Threadripper is not just about core count but also PCIe lanes and Memory bandwith/channels.8 cores have shown to be memory limited in some cases. So 12/16 would also show weakness that a threadripper system would over come.
stanleyipkiss - Wednesday, March 6, 2019 - link
Exactly. I am looking right now at an amazing price for a 1950X for a storage system/server. I will be using all PCI lanes for 8x expansion slots. Nothing comes close to the value on offer with TR4.R0H1T - Wednesday, March 6, 2019 - link
That argument is harder to make given Ryzen 3 will also have PCIe 4.0 & probably up to 16 cores. Now unless someone needs/wants tonnes of PCIe lanes, the move to TR3 would be less rewarding. Of course the extra cores, quad channel memory & obviously workstation/server usage are the major selling points which'd still work in TR's favor.baka_toroi - Wednesday, March 6, 2019 - link
Do you have a source about Ryzen 3 having 16 cores or is it your own prediction?R0H1T - Wednesday, March 6, 2019 - link
>baka_toroiI said "up to" 16 cores & that's probably the worst kept secret ever. Do you have anything to add, other than that?
Flunk - Wednesday, March 6, 2019 - link
Which is why you'd want more memory channels on your database server. Desktop loads? Not going to matter.0ldman79 - Thursday, March 7, 2019 - link
A lot of the memory issues with Threadripper have been settled.Depending on the app even a quad core has been memory limited in the past.
There will certainly come a point where mainstream needs more memory bandwidth but currently I think we're still limited by processing power in most situations. Most, not all.
Santoval - Saturday, March 9, 2019 - link
No, the Von Neumann bottleneck is still the most serious hurdle to increased computer performance. CPUs (and to a lesser extent GPUs) are *much* faster than the main system memory they are paired with, which is why caches have been employed to alleviate the bottleneck and the size of caches keeps increasing. CPUs wait (and have waited for quite a long time) for main memory, not the other way around. CPUs are faster than main memory, faster than L3 cache, faster than L2 and even L1 cache, and are roughly as fast as the tiny memory they have in their registers (let's call that L0 cache).Santoval - Saturday, March 9, 2019 - link
16-core Ryzen CPUs, assuming they are released, will be highly memory bandwidth constrained due to the platform's 2 memory channels. However 16 cores with 2 memory channels is equivalent to 32 cores with 4 memory channels and 64 cores with 8 memory channels : these CPUs all have 1 memory channel per 8 cores.So if 8 cores are indeed memory limited with 2 channels (i.e with 1 channel per 4 cores) the problem with upcoming high core count Zen 2 based CPUs will become twice as worse. It probably doesn't make sense to get a Threadripper with less than 16 cores, but even with 16 cores and 4 memory channels it is just equivalent to a 8-core Ryzen with 2 channels memory bandwidth wise (though with many more PCIe lanes).
Will the I/O die have an extra L4 cache to alleviate the memory bandwidth pressures or would that only make them worse (if the L4 cache's latency was not low enough)? Maybe an L4 cache will be added only to Epyc's large I/O die and possibly to Threadripper's? I have no idea.
shing3232 - Wednesday, March 6, 2019 - link
NOPE,there would be 32Core or maybe even 64Core.PixyMisa - Wednesday, March 6, 2019 - link
And the new I/O die means they can have anything from 4 to 64 cores and still have full memory and PCIe support.tamalero - Wednesday, March 6, 2019 - link
They could enforce segmentation by only allowing low frequencies on the AM4 high core offerings.Example.. 16 core, max PBO and XFR2 4Ghz
Max Threadripper 32 core PBO and XFR = 5 Ghz
sbrown23 - Wednesday, March 6, 2019 - link
It doesn't appear they're going to be doing that. Current rumors have Ryzen 3rd Gen parts with 12 and 16 cores in the 4-5GHz range. If they want to gain marketshare back from Intel, I don't think they will want to artificially clock limit the more mainstream parts. I'm guessing Intel will still have a bit of an IPC advantage, so AMD will probably want to beat them with cores and clocks.Kevin G - Wednesday, March 6, 2019 - link
Clock speeds should all universally move with AMD's design approach. They can bin the chiplets before putting them into packing so that chips that bin the same are packaged the same. This creates uniformity.The clock uptick stems of yield probabilities and they are using a smaller CPU die. There is simply less chance that a single low clocked core can bring down the entire SoC's performance slot. If even there is a core that simply won't clock as high as the rest, AMD can fuse that off to bring forward 12 designs at high clocks. AMD's strategy here is very flexible in what they can bring to market.
MonkeyPaw - Wednesday, March 6, 2019 - link
Nah, HDET has always been for specific customers, and there will always be buyers that want these extreme configurations. MOST users will be better off buying a desktop-class rig, but that has always been the case. How many people even get the most use of 6-8 cores? In my mind, Ryzen 2 needs more single thread performance—more IPC, more clockspeed.Thunder 57 - Thursday, March 7, 2019 - link
One word: Handbrake. Also Battlefield runs better on my 6 core than it did my old quad core.SunLord - Wednesday, March 6, 2019 - link
I'd figure the main benefit of threadripper is for people who want lots of RAM and lots of pcie cards or nvme drivesfazalmajid - Wednesday, March 6, 2019 - link
I'd love a Threadripper as a single-box compile farm. It's unfortunate how massively huge the TR boxes are, I much prefer SFF cases as I don't need GPUs and storage is in M.2 NVMe drives, so lots of drive bays is not a requirement either.Alistair - Wednesday, March 6, 2019 - link
Buy the micro atx threadripper motherboard.WinterCharm - Wednesday, March 6, 2019 - link
Unless your workload really benefits from 32 or 64 cores which is what the next generation of thread ripper should bring. :)Hul8 - Wednesday, March 6, 2019 - link
AMD could go for an entire "Champion of Consumer Choice" PR campaign; "Choose your core count. Choose your connectivity. No locked features. Pay for What You Need."eek2121 - Thursday, March 7, 2019 - link
Not really, Threadripper has always featured "cream of the crop" CPUs along with quad channel DRAM. For instance, my 1950X sits here running stable at 4.25 GHz and 64 GB of DDR4-3200 DRAM.Opencg - Thursday, March 7, 2019 - link
amd claims the new ryzen will rival the 9900k in games. I believe this to be true but another question is will the price be lower (i doubt it). and even more important will they have a rival to ths 9700k and 9600k in VALUE considering those are really good value buys for anyone who wants near 9900k performance at a much lower price.not a fanboy of any of these companies but I am rooting for progress and intel does have some high value k variant cpus this time
BigMamaInHouse - Wednesday, March 6, 2019 - link
64C Mac Pro Incoming .... :-)wow&wow - Wednesday, March 6, 2019 - link
AMD: No "SPOILER" inside!Intel: "SPOILER" inside!
The difference in the integrity instead of getting the performance numbers at all costs!
SanX - Wednesday, March 6, 2019 - link
Lack of AVX512 makes AMD less attractive vs Intel. Ian own test with 3D particle movement shows 3-4x speedup with AVX512 unless he got a bug in his codehansmuff - Wednesday, March 6, 2019 - link
Less attractive for a very tiny niche, perhaps. You simply won't see AVX512 being a factor in regular applications or games. 3D particle movement is great but not a use case for those sorts of applications.HStewart - Wednesday, March 6, 2019 - link
AVX512 is going to be standardize on most Intel CPU's by 2nd half of 2019. We will be seeing more applications use it because of this.zmatt - Wednesday, March 6, 2019 - link
It will take some time for AVX512 to be widely adopted. New instructions are always slow to get deep market penetration. This is due to several reasons but one of the major ones is that for most programmers it isn't up to them at all. what instructions are used is something usually determined at the compiler level not necessarily in the source code. Different instructions can be selected to be used in the compiler settings but it can be hard to know what exactly comes out on the other side. Long running projects are also unlikely to immediately start supporting new features for the sake of compatibility and if you are a developer who uses a high level interpreted language like JavaScript or Python then you are so far removed from the metal you have effectively zero say in what assembly level instructions are called.The_Assimilator - Thursday, March 7, 2019 - link
Compatibility is not an issue, you just guard the AVX512 codepath behind a CPUID check, and if the CPU doesn't have AVX512 you simply fall back on the current codepath.Thunder 57 - Thursday, March 7, 2019 - link
Why check the CPUID when you can check for "GeniuneIntel"? /sHStewart - Wednesday, March 6, 2019 - link
The real big difference is that AMD is basing there numbers on pre-Sunny Cove, Sunny Cove changes everything besides just AVX512 is going be include as standard on Sunny Cove processorsSunny cove has even more significant architexture changes that should significantly change performance with more execution units and larger caches.
Also I not sure how far Intel plans to go with Foveres 3D packaging - which should significantly help the CPU by allowing more transistors in same CPU area - allowing IO, CPU, GPU and Memory ( likely graphics memory ) to all be on different levels.
Alistair - Wednesday, March 6, 2019 - link
So basically you're saying people didn't buy AMD when they were behind. Now they are up to 6 months ahead of Intel you still want to wait for Intel?Alistair - Wednesday, March 6, 2019 - link
Current pricing on Intel CPU's is ludicrous. I've built so many 2600/2600x/2700/2700x computers in the last few months mainly because of the pricing problem Intel has right now.Manch - Thursday, March 7, 2019 - link
I'll sum up HStewart's comments on every article whether or not it's about Intel, this is what he will say....HStewart: Intel shill shill shill shilly mcshill shill shillty shill shill, shill. AMD sucks. Intel shillllllllllllll......
Thunder 57 - Friday, March 8, 2019 - link
That's about right. I wonder why this bozo doesn't show up in the forums? Because his nonsense would be ripped apart?Xyler94 - Thursday, March 7, 2019 - link
I really, really don't share your enthusiastic "Significant change in performance" as you do. On paper, yes Sonny Cove looks amazing, but so did Skylake compared to Haswell. I'm expecting at most 15% increase from the architecture change. Remember AMD also doubled parts of their execution code path, namely the AVX stuff from Zen+ to Zen2, and that gained them up to 28% in very specific workloads.But you'll ignore this, as all shills do
voicequal - Wednesday, March 6, 2019 - link
3D particle movement should probably be running on a GPU.GreenReaper - Thursday, March 7, 2019 - link
Like Intel would give away the most useful parts of AVX-512 on low-level CPUs, anyway, if it could get away with *not* doing so to enable product segmentation. They didn't enable AVX on Celeron until Kaby Lake Refresh this January, when suddenly it *and* AVX2 magically appeared:https://en.wikipedia.org/wiki/List_of_Intel_Celero...
Of course, that's Celeron Mobile, not the desktop CPUs. And why? Because Intel's own argument was being used against them with the AMD's 2xxxU mobile, which have them both. Never mind that power usage in that segment makes the benefit of such code dubious.
Having more cores will trump AVX-512 most of the time. Especially since AVX-512 can limit your max turbo speed. Intel themselves have backed off their own compiler from using AVX-512 instructions in many cases, because of the negative impact they have on other executing code:
https://lemire.me/blog/2018/08/13/the-dangers-of-a...
The other comments there are worth reading too - did you know there are multiple levels of AVX clock-reduction? Naturally it's worse if more CPU cores are involved, because it uses more power:
https://en.wikichip.org/wiki/intel/xeon_gold/5120#...
There are clear potential advantages to new instructions, but unclear costs, In many cases the benefit is illusionary, because the CPU simply can't run at full power using those instructions. Perhaps these restrictions will be alleviated by 10nm. Until then, we can't rely on it being useful, and therefore it's not going to factor into our purchasing decisions.
Sivar - Friday, March 8, 2019 - link
This is good stuff. AVX512 and its throttling effect is new information to me.Please post more often!
deil - Wednesday, March 6, 2019 - link
this design have one more benefit. Hottest parts are way apart on silicon. This means single thread performance might be same as 2-4 threaded. We all use threaded stuff more and more. With this cpu's it really might be a lot of gains, but not in our usual metrics.The_Assimilator - Thursday, March 7, 2019 - link
Yeah, no. Please do some research before you post BS like this.HStewart - Thursday, March 7, 2019 - link
I think the for single thread and even multi-threaded performance is not really much depending on separating IO - but more on execution unit changes. More cores does not always mean more performance - it also depends on designed of architexture that makes up cpu.The problem with game development unless something has been significant has been change in technology - the display part of screen is a single thread resource.
Dachyshun - Wednesday, March 6, 2019 - link
TR looks to be tick tick on core count. Tick is frequency tick is cores. First gen had 16, gen 2 has 32, gen 3 will have 32, gen 4 gets 64Mazarax - Wednesday, March 6, 2019 - link
Just wondering... are there any plans by AMD to produce CPUs with AVX-512, or will that forever be an Intel-only extension?Manch - Thursday, March 7, 2019 - link
It's probably in the pipe.peevee - Wednesday, March 6, 2019 - link
"AMD’s 3rd Gen Ryzen processors for desktops rely on the brand-new design code-named Matisse. Matisse features two dies: a chiplet die containing eight cores based on the Zen 2 microarchitecture, and built using TSMC’s 7N manufacturing process; and an I/O die featuring PCIe 4.0 lanes"Welcome to 2010 (Clarkdale). "Brand new".
boozed - Wednesday, March 6, 2019 - link
So the 2nd gen Ryzen Pro mobile comes after the 3rd gen Ryzen desktop?azrael- - Thursday, March 7, 2019 - link
Only if spring comes after mid-year ...but hey, it's a crazy world! ;-)boozed - Thursday, March 7, 2019 - link
My world's so crazy that spring is still six months away.Manch - Thursday, March 7, 2019 - link
South of the equator? ;)azrael- - Thursday, March 7, 2019 - link
Now, the thing currently most on my mind regarding 3rd gen Ryzen desktop processors is if AMD uses the chiplet design to deny us lowly consumers a MMU supporting ECC, either leaving that for Ryzen Pro, Threadripper or even EPYC. I'm currently planning to do a Ryzen 3000 build later this year, but ONLY if I can get ECC support.davie887 - Thursday, March 7, 2019 - link
Don't see why they would gimp ECC support, they haven't yet with Zen. It's a board partner decisionazrael- - Friday, March 8, 2019 - link
To save costs, I guess. And/or to segment the market (although I'll give AMD the benefit of the doubt with this one).Before going with the chiplet approach AMD pretty much only had the option of putting so many CCXs on the die. Now, with chiplets they can pretty much mix and match. And it's not as if these would be the first Zen-based processors without ECC support. The Raven Ridge mobile processors have that honor.
Anyway, I hope I'll be pleasantly surprised when AMD decides to share more details on the upcoming desktop range. I *really* want a Ryzen 3000 in my next build.
twtech - Friday, March 8, 2019 - link
I don't know how much they can do with it based on a chiplet design, but a high-clocked 32-core/64-thread TR that doesn't make memory access concessions would hit the sweet spot for workstation use.If they're going 16-core with the consumer-oriented Ryzen line, they might as well make TR the equivalent of Intel's Xeon W line, and provide full performance and features for 1S professional workstations.
Supercell99 - Saturday, March 9, 2019 - link
Its very scalable. I am testing a prototype 256 core Ryzen bridged with infini, extremely low latency. The only issue is power right now.