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  • austinsguitar - Monday, August 17, 2020 - link

    :) nice glued together gpus.
  • shabby - Monday, August 17, 2020 - link

    Almost looks like pl adhesive...
  • CajunArson - Monday, August 17, 2020 - link

    If you want to call the advanced 2D & 3D packaging that Intel is using "glue" then Lisa Su would gladly kill your dog if it meant she could sniff it.
  • close - Tuesday, August 18, 2020 - link

    That's actually Intel's official terminology for AMD's EPYC "glued together" CPU in the past. So why call this "advanced 2D & 3D packaging" when these are just glued together GPUs? Comments? Questions? ;)

    https://www.techpowerup.com/235092/intel-says-amd-...
  • edzieba - Tuesday, August 18, 2020 - link

    Because of the difference between through-substrate interconnects and through-silicon interconnects (EMIB, or whole-package interposer, or stacked TSV) in power, bandwidth, and latency (redrivers ain't free y'know).

    Intel's 'glue' comment stemmed from AMD's use of the same term for the dual-die Pentium D.
  • yeeeeman - Tuesday, August 18, 2020 - link

    Exactly. How AMD fanboys forget that AMD also had its irony moments...
    But nowadays, only Intel is making mistakes and AMD is perfection.
  • deil - Tuesday, August 18, 2020 - link

    Context is needed. You expect more from someone who was leader for 10+ years without any competition. Also AMD for someone that was unable to pull its pants up for so long, this is incredible progress. they like, switched places within 5 years?
  • Flunk - Tuesday, August 18, 2020 - link

    Just because AMD has said stupid things, doesn't mean you can't call out Intel for saying stupid things. And not everyone who speaks out against Intel is autmatically a fan of their #1 competitor.
  • close - Tuesday, August 18, 2020 - link

    @yeeeeman, "But nowadays, only Intel is making mistakes and AMD is perfection." Pretty accurate although AMD is also far from perfection. This being said let's hold the whining until the roles switch again.
  • dullard - Tuesday, August 18, 2020 - link

    Exactly. Intel was ridiculed by AMD and AMD supporters for years for "gluing". Then, suddenly one internal slide on one presentation from Intel joked back about AMD "gluing" and it is now Intel's fault for using the term. Why can't people understand the context?
  • close - Tuesday, August 18, 2020 - link

    It's not a "fault", it's something that made it into their lingo. Now both companies use it to jab each other. The problem is born yesterday commenters who can't get a joke older than they are and in their quest to sound smart just ruin it.
  • close - Tuesday, August 18, 2020 - link

    @edzieba, no, there's no "Because of the difference between" on this Earth that makes a shred of difference for the purpose of this discussion.

    It's a "running joke" that's been going for a decade and a half. It's not as if they are *actually* glued so trying to explain it with tech is pretty dumb. It's as simple as "single package" vs "multiple packages" and egos.
  • psychobriggsy - Wednesday, August 19, 2020 - link

    Although AMD was reasonably correct with the Pentium D - it was two dies on the same package, but there was nothing special about the die interconnect, they were both connected to the same old Front Side Bus with all the limitations that brought with a multi-drop bus. It saved motherboard sockets and space at least.

    Whereas Epyc at least had dedicated chip links through a fabric. Obviously it had its own flaws due to the arrangement and decentralised I/O aspects that Epyc 2 fixed.

    Of course, this GPU has its own dedicated fabric interconnect as well, and indeed RDNA3 or 4 is supposed to go chiplet based as well. The glue term should go away.
  • dullard - Tuesday, August 18, 2020 - link

    https://www.anandtech.com/show/1665/2
  • dullard - Tuesday, August 18, 2020 - link

    Close, no, it was not Intel's terminology. It was AMD's terminology from 15 years ago. Comments? Questions?
  • Luminar - Wednesday, August 19, 2020 - link

    The actual terminology is Intel duct tapes while AMD innovates.
  • name99 - Thursday, August 20, 2020 - link

    Lisa Su doesn't need to kill anyone's dog. She just needs to contract with Siliconware (and likely already has):
    https://www.3dincites.com/2020/07/iftle-456-spil-f...

    EMIB is just the Intel brand for something that other people can also do.
  • Adonisds - Monday, August 17, 2020 - link

    How would more than 1 tile scale for gaming? Would it not scale well, like SLI?
  • Duraz0rz - Monday, August 17, 2020 - link

    I doubt they'll bring this type of tiling to the HPG line; these GPUs are destined for data centers and racks where density is king.
  • Valantar - Tuesday, August 18, 2020 - link

    "scale well, like SLI" - did you mean "scale well, UNlike SLI"? Otherwise, that statement is self-contradictory.
  • psychobriggsy - Wednesday, August 19, 2020 - link

    I would presume that from the overall GPU viewpoint, there was no observable effect of the chiplets, due to the thousands of inter-chiplet I/Os keeping the device appearing to work as a single entity.

    Very different from SLI, which is two+ very separate entities with their own memory pools and independent operation, with some syncing and frame copying.
  • Kevin G - Monday, August 17, 2020 - link

    This is what Intel needs to be doing on the CPU side of things. Throw their IO logic to a separate die and scale up the number of CPU cores via EMIB/interposers. You'd think that Intel's "mesh" topology would lend itself to such scaling.
  • yeeeeman - Tuesday, August 18, 2020 - link

    They will probably do it with Alder Lake since we don't know yet what the packing tech will be. From Intel slides I understand they will use the same kind of techniques like in Lakefield, so base die with IO and top die compute. Also, more cores is not the only solution....Intel can make their big cores fatter and add SMT4 or even SMT8 and boom, they have 64 threads from 16 cores CPUs. Sure, performance wise they won't be the same, but who cares, in desktop space basically no one uses more than 8/12/16 cores...
  • yeeeeman - Tuesday, August 18, 2020 - link

    Looks like. Also, 10Tflops of FP32 would make a very nice midrange GPU in 2021.
  • TrevorH - Tuesday, August 18, 2020 - link

    The main picture is presumably a block of 16 of them in one package. Or at least I hope it is or we'll need to go back to 1980's era luggable laptops to fit that in...
  • tipoo - Tuesday, August 18, 2020 - link

    These won't be for laptops
  • neojack - Tuesday, August 18, 2020 - link

    those are for huge expension cards, probably watercooled

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